Why I2C needs pull-ups at all
SDA and SCL are open-drain (or open-collector) lines: every device can pull them low, and nobody drives them high. A resistor to the supply, Rp, returns each line to the high level. The line rises along an RC curve formed by Rp and the total bus capacitance Cb - every pin, trace and cable on the bus adds to it. That RC curve is where both limits come from.
The two limits from UM10204
Minimum resistance: the sink-current limit
A device pulling the line low must reach the maximum low level, VOL(max) = 0.4 V, while sinking the current through the pull-up. Standard-mode and Fast-mode devices only guarantee 3 mA (Fast-mode Plus: 20 mA), so:
Rp(min) = (VDD - VOL(max)) / IOL
At 3.3 V: (3.3 - 0.4) / 3 mA = 967 Ω. At 5 V: 1.53 kΩ. Go lower and the "low" level may not be read as low.
Maximum resistance: the rise-time limit
The spec measures rise time from 30% to 70% of VDD. For an RC charge that takes t = RC × ln(0.7/0.3) = 0.8473 × RC, so the largest usable pull-up is:
Rp(max) = tr / (0.8473 × Cb)
| Mode | Max rise time tr | Max bus capacitance | IOL for VOL = 0.4 V |
|---|---|---|---|
| Standard-mode, 100 kHz | 1000 ns | 400 pF | 3 mA |
| Fast-mode, 400 kHz | 300 ns | 400 pF | 3 mA |
| Fast-mode Plus, 1 MHz | 120 ns | 550 pF | 20 mA |
Pull-up calculator
Worked examples
3.3 V, 400 kHz, 100 pF: Rp(min) = 967 Ω, Rp(max) = 300 ns / (0.8473 × 100 pF) = 3.54 kΩ. Anything from 1 kΩ to 3.3 kΩ works; 2.2 kΩ leaves margin on both sides.
3.3 V, 100 kHz, 100 pF: Rp(max) grows to 11.8 kΩ, so the popular 4.7 kΩ and 10 kΩ values are both valid - which is why they "always work" on short, slow buses.
Long cable, 400 pF, 400 kHz: Rp(max) falls to 885 Ω, below Rp(min). No resistor satisfies both limits: slow the bus down, shorten it, or add an I2C buffer or active pull-up.
Estimating bus capacitance
UM10204 allows up to 10 pF per device pin. Add the PCB traces (a few pF for a small board), connectors and any cable, which can easily add tens to hundreds of pF. For a compact board with three or four chips, 30 to 100 pF is a reasonable planning range; measure the rise time with an oscilloscope if you are close to a limit.
Common mistakes
- No pull-ups at all. Relying on MCU internal pull-ups, which are typically tens of kilohms, is only acceptable for very short, slow buses. Many sensor breakout boards include pull-ups; a custom board built from bare chips usually does not.
- Too many in parallel. Three breakout modules with 4.7 kΩ each put 1.57 kΩ on the bus. Add a fourth and you are approaching the 3 mA limit. Remove the extras or cut their solder jumpers.
- Pulling up to 5 V with a 3.3 V MCU. ESP32 and RP2040 pins are not 5 V tolerant; only some STM32 pins (marked FT) are. Pull up to 3.3 V or use a level shifter.
- SDA and SCL swapped. Easy to do when a chip's pin names follow SPI conventions (SDI/SCK). Check each pin against the datasheet.
- Pull-up on a strapping pin. On an original ESP32, an I2C pull-up on GPIO12 changes the flash voltage at boot. See the strapping-pin guide.
How the checker judges your pull-ups
The I2C rule finds SDA/SCL by net name and by pin function, adds up parallel pull-ups on each line, and compares the result with Rp(min) for the pull-up voltage and with the rise time at an assumed 50 pF - a small board with a few devices. Values above the 100 kHz limit are warnings; values that only fail at 400 kHz are informational, because your bus speed and capacitance may differ. Use the calculator with your real numbers.
Primary sources
- NXP UM10204: I2C-bus specification and user manual (Rev. 7.0: pull-up sizing and the timing tables)
- TI SLVA689: I2C Bus Pullup Resistor Calculation